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Sep. 08, 2026
With the rapid expansion of AI computing clusters, mass commercial adoption of 800G/1.6T optical modules, implementation of CPO (Co‑packaged Optics) technologies, and full‑scale acceleration of 5G‑A networking, data transmission rates of hardware systems have fully entered the ultra‑high‑speed era.
In this era, high‑speed hardware has moved beyond the basic requirement of merely delivering a target frequency. Conventional single‑ended CMOS crystal oscillators suffer from high jitter and poor anti‑interference performance. When deployed in SerDes and PAM4 high‑speed links above 10Gbps, they frequently trigger eye‑pattern degradation, link retraining, packet loss and bit errors. Differential‑output crystal oscillators with femtosecond‑level (fs) ultra‑low jitter have become a core qualification requirement for next‑generation high‑speed equipment.
Addressing widespread timing‑related pain points across industries, Saisi launches its brand‑new generation DXO ultra‑low‑jitter differential crystal oscillator, delivering highly reliable timing solutions for optical communications, AI computing servers, mobile communications and other application segments.
1. Major Launch: Official Release of Saisi New Differential Crystal Oscillator Series
Saisi introduces the brand‑new ultra‑low‑jitter differential crystal oscillator series. Optimized for high‑speed data transmission, harsh electromagnetic environments, wide‑temperature industrial operation and high‑precision clock synchronization scenarios, the series features differential output architecture, low‑jitter performance and stable frequency output. It supplies highly reliable clock components for 400G/800G/1.6T optical modules and next‑generation high‑speed interconnection for AI computing.
2. Full‑Scenario Compatibility: Six Core High‑Speed Interconnection Use Cases
Beyond optical modules, this new product line precisely fits six key high‑speed interconnection scenarios and resolves timing challenges in diverse fields:
1. **High‑speed optical modules (400G/800G/1.6T, etc.)**: Core components inside modules including DSP, CDR, TIA and laser drivers share one crystal oscillator as the reference clock. Given the minimal PAM4 eye‑pattern margin, slightly elevated reference‑clock jitter will deteriorate CDR bit‑error rate. The Saisi DXO series delivers typical phase jitter as low as 44 fs at 156.25 MHz, with frequency coverage from 25 MHz to 625 MHz, ensuring crystal‑oscillator‑induced degradation of eye‑pattern opening is avoided.
2. **AI Servers / GPU Clusters**: Systems feature densely‑populated on‑board GPUs, NVLink and PCIe 6.0 alongside strong power‑supply noise. Clock trees need to support three differential voltage levels, bringing high complexity for component selection and PCB layout. The Saisi DXO series offers LVPECL / LVDS / HCSL differential outputs and 1.8 V / 2.5 V / 3.3 V supply‑voltage options. Each single device supports one fixed voltage level; different part numbers cover full clock‑tree requirements for the whole board, reducing BOM cost, PCB footprint and filtering components.
3. **Data‑Center Switches & Router Line Cards**: Forced air‑cooling creates hot‑zone temperatures exceeding 85 °C inside data centers, while optical‑port density keeps rising. Clock devices must withstand high temperatures and fit into millimeter‑scale gaps. The Saisi DXO ultra‑low‑jitter series supports extended temperature range of ‑40 °C ~ +125 °C. Even in the compact 2520 package, it maintains 44 fs typical jitter, suitable for placement around QSFP‑DD / OSFP front‑ends and switch ASICs.
4. **5G‑A / 6G Base Stations**: Outdoor base stations are required to maintain stable operation up to 125 °C. Restrictions apply to high‑frequency differential oscillator supplies for wireless fronthaul at 122.88 MHz and 156.25 MHz. The Saisi DXO series provides wide‑temperature operation from ‑40 °C to +125 °C and stable supply assurance to ease supply‑chain concerns for base‑station hardware.
5. **Industrial High‑Speed Data Acquisition**: Motors and switching power supplies generate heavy electromagnetic interference in industrial environments. ADC/DAC sampling performance is highly sensitive to clock edge quality; clock jitter directly translates into sampling errors. Differential signals from Saisi DXO effectively suppress common‑mode interference. Femtosecond‑level ultra‑low jitter delivers clean sampling clocks for high‑speed acquisition cards, minimizing sampling distortion and guaranteeing authentic acquisition data.
6. **PCIe Interfaces / Enterprise‑Grade SSDs**: PCIe 4.0/5.0/6.0, CXL and enterprise SSD controllers are extremely sensitive to REFCLK jitter. Excessive jitter causes link retraining and throughput degradation. Supporting HCSL differential output, the Saisi DXO series can directly feed reference‑clock inputs for high‑speed interfaces such as PCIe 5.0/6.0 and CXL, lowering interface re‑transmission rates and improving throughput and long‑term operational reliability of storage hardware.
3. Empowering Underlying Timing for Computing Networks and Advancing High‑End Component Supply
Previously, 156.25 MHz and higher‑frequency low‑jitter differential crystal oscillators were largely supplied by overseas manufacturers, suffering from long lead‑times and compliance uncertainties, which created persistent challenges for many hardware teams. As export restrictions targeting high‑frequency clock components tighten globally, supply‑chain stability for high‑performance crystal oscillators has become a key industry concern.
Backed by Saisi’s 40,000 m² in‑house crystal‑oscillator manufacturing facility, the new‑generation DXO ultra‑low‑jitter differential oscillators cover the complete workflow: device design, wafer selection, process tuning and reliability validation. Key performance metrics match international peer products, with mass‑production availability to ease supply pressure for high‑end components.
In addition to the newly launched DXO series, multiple Saisi differential crystal oscillator variants are entering mass‑production, covering broader frequencies, packages and operating conditions to deliver more hardware options for high‑speed interconnection. Stay tuned for upcoming product updates.
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